SN74HC165PW

Parallel to Serial, Serial to Serial, 1 Element, 8 bit, TSSOP, 16 Pins

SN74HC165PW has clock suppression function and complementary serial output. When SH/LD keeps high level and CLK INH keeps low level, the clock is realized by the low-level to high-level transition of the clock input. The functions of CLK and CLK INH are interchangeable. Because the low-to-high transition of low CLK and CLK INH also completes the timing, only when CLK is high, CLK INH must be changed to high level.